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| Place of Origin | Call |
| Brand Name | STMicroelectronics |
| Certification | ROHS |
| Model Number | STM32F405OEY6TR |
STM32F405OEY6TR Datasheet| Attribute | Attribute Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Product Category | Microcontrollers |
| Series | STM32 F4 |
| Packaging | Tape & Reel (TR) |
| Mounting-Style | SMD/SMT |
| Tradename | STM32 |
| Package-Case | 90-UFBGA, WLCSP |
| Operating-Temperature | -40°C ~ 85°C (TA) |
| Supplier-Device-Package | 90-WLCSP |
| Number-of-I-O | 72 I/O |
| Speed | 168MHz |
| EEPROM-Size | - |
| Core-Processor | ARMR CortexR-M4 |
| RAM-Size | 192K x 8 |
| Program Memory | FLASH |
| Peripherals | Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT |
| Connectivity | CAN, EBI/EMI, I2C, IrDA, LIN, SPI, UART/USART, USB OTG |
| Voltage-Supply-Vcc-Vdd | 1.8 V ~ 3.6 V |
| Core-Size | 32-Bit |
| Program-Memory-Size | 512KB (512K x 8) |
| Data-Converters | A/D 13x12b, D/A 2x12b |
| Oscillator-Type | Internal |
| Maximum Operating Temperature | + 85 C |
| Operating temperature range | - 40 C |
| Operating-Supply-Voltage | 1.8 V to 3.6 V |
| Core | ARM Cortex M4 |
| Processor-Series | ARM Cortex-M |
| Data-Bus-Width | 32 bit |
| Package-Case | WLCSP-90 |
| Maximum-Clock-Frequency | 168 MHz |
| Data-RAM-Size | 192 kB |
| Data-RAM-Type | SRAM |
The STM32F405xx and STM32F407xx family is based on the high-performance ARM® Cortex™-M4 32-bit RISC core operating at a frequency of up to 168 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all ARM single precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. The Cortex-M4 core with FPU will be referred to as Cortex-M4F throughout this document.
• Core: ARM 32-bit Cortex™-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 168 MHz,
memory protection unit, 210 DMIPS/
1.25 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
• Memories
– Up to 1 Mbyte of Flash memory
– Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM
– Flexible static memory controller
supporting Compact Flash, SRAM,
PSRAM, NOR and NAND memories
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
– 1.8 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
• Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC, 20×32 bit backup
registers + optional 4 KB backup SRAM
• 3×12-bit, 2.4 MSPS A/D converters: up to 24
channels and 7.2 MSPS in triple interleaved
mode
• 2×12-bit D/A converters
• General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
• Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 168 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
• Debug mode
– Serial wire debug (SWD) & JTAG
interfaces
– Cortex-M4 Embedded Trace Macrocell™
• Up to 140 I/O ports with interrupt capability
– Up to 136 fast I/Os up to 84 MHz
– Up to 138 5 V-tolerant I/Os
• Up to 15 communication interfaces
– Up to 3 × I2C interfaces (SMBus/PMBus)
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO
7816 interface, LIN, IrDA, modem control)
– Up to 3 SPIs (42 Mbits/s), 2 with muxed
full-duplex I2S to achieve audio class
accuracy via internal audio PLL or external
clock
– 2 × CAN interfaces (2.0B Active)
– SDIO interface
• Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
• 8- to 14-bit parallel camera interface up to
54 Mbytes/s
• True random number generator
• CRC calculation unit
• 96-bit unique ID
• RTC: subsecond accuracy, hardware calendar
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